Xiaomi's 1.22TB/s vs Apple's 1.2TB/s: Different Scopes

The Same Week Brought Us Xiaomi’s AI Cube and the New Mac Studio

On August 24, at a technical briefing for its Xuanjie (玄戒, “mystery talisman”) chips, Xiaomi unveiled three self-developed chips along with a prototype mini PC called the “AI Cube” that bundles them together. Just days later, Apple launched a new Mac Studio powered by the M5 Max and M5 Ultra, plus a new Mac mini powered by the M6 and M5 Pro. Preorders opened on August 27, with shipping set for September 22.

So in the same week, two kinds of AI boxes meant for your desk arrived. And both announcements featured nearly identical numbers: Xiaomi cited 1.22TB/s, Apple cited 1.2TB/s.

But the two figures measure different scopes. And there’s a more important thing these two companies have in common. Both design their chips in-house but buy manufacturing and memory from outside suppliers. And that supplier list includes a Korean memory company.

Comparing the Announced Specs of Both Products

Let me lay out exactly what was announced first, because the numbers get mixed together in a way that’s easy to misread.

Xiaomi’s Xuanjie O3 is an SoC for flagship smartphones. It’s built on a 3nm process with 24 billion transistors and a die area of 133mm². The 10-core CPU clocks up to 4.35GHz, paired with a 16-core GPU and a 200 TOPS NPU. What stands out is that it’s the industry’s first chip to support LPDDR6¹, hitting 10,667Mbps in speed and 113.8GB/s in bandwidth — 48% wider than LPDDR5X 9600.

The Xuanjie O100 is a chip built for large-model acceleration. It uses a 6nm process with 3D wafer-level stacking packaging, and with 28,672 effective data lines, Xiaomi says it delivers near-memory computing² bandwidth of up to 1.22TB/s.

The Xuanjie D100 is a chip for smart driving. It’s 3nm, with a 20-core CPU, a 16-core NPU, and support for up to 160GB of memory. Mass production is reportedly slated for 2027.

The AI Cube bundles all three into a single box: 150W of sustained performance, up to 160GB of unified memory, and the ability to run models locally from 3B to 120B parameters. It’s an unabashedly showy piece of hardware — aerospace-grade aluminum with 33,874 CNC-machined holes. There’s no price and no release date. It’s an engineering prototype.

On the other side is Apple. The M5 Ultra Mac Studio packs a 36-core CPU with an 80-core GPU, and up to 512GB of unified memory with 1.2TB/s of bandwidth. Apple described it as capable of running even massive LLMs entirely on-device. Pricing starts at ₩9,490,000 (~$6,850). The M5 Max offers 128GB of memory at 614GB/s, starting at ₩4,290,000 (~$3,100). On the Mac mini side, the M5 Pro comes with 64GB at 307GB/s for ₩2,990,000 (~$2,160), while the M6 offers 32GB at 170GB/s starting at ₩1,499,000 (~$1,080).

1.22TB/s and 1.2TB/s: Numbers From Different Categories

Xiaomi’s 1.22TB/s and 160GB are numbers you shouldn’t lump together.

1.22TB/s is the near-memory bandwidth of the O100. 160GB is the memory capacity supported by the D100. They’re different figures for different chips. Nowhere in the announcement does it say “160GB gets read at 1.22TB/s.”

Apple’s 1.2TB/s is a different animal entirely. It’s the bandwidth attached to the entire 512GB of unified memory. One chip, one memory pool.

	Max Memory	Memory Bandwidth	Scope	Price	Status
Xiaomi AI Cube	160GB (D100)	1.22TB/s (O100)	Per-chip, separate	Undisclosed	Prototype
Mac Studio M5 Ultra	512GB	1.2TB/s	Entire unified memory	₩9,490,000 (~$6,850) and up	Ships 9/22
Mac Studio M5 Max	128GB	614GB/s	Entire unified memory	₩4,290,000 (~$3,100) and up	Ships 9/22
Mac mini M5 Pro	64GB	307GB/s	Entire unified memory	₩2,990,000 (~$2,160) and up	Ships 9/22
Mac mini M6	32GB	170GB/s	Entire unified memory	₩1,499,000 (~$1,080) and up	Ships 9/22
NVIDIA DGX Spark	128GB	273GB/s	Entire unified memory	$3,999	On sale

Lay it out in a table and the real significance of this announcement becomes clear. Loading a large model whole into memory and reading the entirety of it at 1.2TB/s is something, at this point in time, only Apple can do.

This is the price a heterogeneous-chip architecture has to pay. Xiaomi stitched together three chips with different characteristics, but you can’t simply add up each chip’s bandwidth and capacity and use the sum. Data still has to move between the chips, so you can’t read each chip’s announced figure as the performance of the whole system.

This isn’t an “Apple good, Xiaomi bad” story. If you just pull the biggest number off each spec sheet and compare them, the two products look like they’re in the same class. In reality, they’re entirely different kinds of things.

Where the Process and Memory Come From

Now let’s look at what these two have in common.

The Xuanjie O3 is manufactured on TSMC’s N3P process. Xiaomi designs it, Taiwan fabs it. Memory is even more interesting. That LPDDR6 the O3 claims to be the industry’s first to support — the leading candidate as first supplier is SK Hynix. It finished developing its 10nm-class 6th-generation (1c) process in March and plans mass-production shipments in the second half of the year. The company hasn’t confirmed the customer, but the industry consensus is that the first volume is headed to Xiaomi’s next flagship. Samsung Electronics is in the same supply race, having announced its own 1b-process LPDDR6 in January.

Apple’s situation isn’t so different, though. Apple doesn’t own a foundry. The M-series chips are fabbed at TSMC. What Apple calls “unified memory” is DRAM it, too, buys from outside memory makers. What Apple actually owns is the design, the system integration, and the software layered on top.

Put together, the two companies’ structures are strikingly alike.

• Design: In-house, each
• Manufacturing: TSMC
• Memory: External DRAM makers

In other words, doing the design in-house while outsourcing manufacturing and memory isn’t unique to Xiaomi — it’s the industry’s standard playbook. Apple proved it over 20 years, and Xiaomi is now following the same path.

So the framing that “Xiaomi built an AI box without NVIDIA, AMD, or Huawei’s Ascend” is only half true. The only thing Xiaomi did on its own was the design; manufacturing and memory were simply purchased, at normal terms, from the best suppliers in the world.

This is exactly where Huawei diverges. Because Huawei is under sanctions, it can’t access TSMC’s leading-edge nodes and has to build its Ascend chips using SMIC’s process and self-sourced memory. So Huawei’s chip is simultaneously a symbol of technological self-reliance and the product of process constraints. Xiaomi, sitting outside the sanctions line, can simply buy the best foundry and the best memory available. The reason Xiaomi’s chip uses a more advanced process than Huawei’s isn’t superior technology — it’s whether or not you’re on the sanctions list.

The O100’s use of 6nm with 3D stacking reads the same way. HBM³ is expensive, and supply is effectively tied up by data-center GPUs. It’s hard to fit into a consumer-grade box. So Xiaomi chose a workaround: stacking the compute chip and memory directly at the wafer level to shorten the distance between them. And in areas that don’t need the leading edge, it saves cost by using a process a generation behind.

Why the D100, a chip built for autonomous driving, ended up in a desktop AI box

The thing I spent the most time staring at in this presentation was the D100.

The D100 is a smart-driving chip, and it’s sitting inside a desktop AI box. That looks strange at first, but once you line up the requirements, it makes sense. An automotive AI chip needs to support large-capacity memory, keep heat and power under tight control, and run reliably in an always-on state. That’s essentially the same requirement set as a local LLM box.

So Xiaomi didn’t build a new chip for a new category. It simply added one more use case to a chip it was already building for cars. The picture is phones, cars, appliances, and PCs all bound into a single chip family. The direction differs from Apple’s path — scaling up the iPhone’s A-series and moving it into the Mac — but the structure is the same.

There’s a Korea-relevant implication here too. A Hana Securities report includes estimates putting CXMT’s DRAM production share close to Micron’s level. That’s a different metric from revenue share. Right now, Xiaomi is buying Korean memory. But for a company that does its own chip design, a memory supplier is always a negotiable position, one that can be swapped out at will. Being the first supplier today is welcome news, but it doesn’t imply a long-term contract.

To be honest about it, the AI Cube is still a prototype. There’s no price, no launch date, and given that mass production of the D100 isn’t slated until 2027, this box becoming something you can actually buy is, at the earliest, a story for the year after next. Meanwhile the Mac Studio ships next month. That gap in timing — AI Cube at the earliest the year after next, Mac Studio next month — is the real distance between the two companies right now.

Oswarld’s Lens

I don’t read this announcement as “China’s semiconductor rise.” If anything, this announcement made it clearer that China still has to buy leading-edge process and memory from outside. But the same is true for Apple.

What catches my attention is that you can open a new category just by handling the design yourself. In building GTM strategies, I’ve repeatedly seen the same pattern: new categories aren’t opened by the company that invented the component, but by the company that redefines how existing components are combined.

If that’s the case, Xiaomi’s battleground isn’t performance — it’s price. Apple is selling 512GB of unified memory with 1.2TB/s of bandwidth starting at ₩9,490,000 (~$6,850). For Xiaomi to matter in this market, it needs to either put out a comparable spec at half the price, or take the low end that Apple isn’t bothering with at all. That’s exactly what Xiaomi has done best for the past 15 years.

I run local AI myself, too. I keep a Mac Studio as a resident inference server and use a MacBook as the client, and hooking a coding agent up to a local model actually works now. Still, I’d be careful about saying “with no constraints whatsoever.” It bottlenecks in two places. If the context window is set too small, the earlier parts of a long conversation get silently truncated without warning, and on hard reasoning tasks spanning multiple files, retries noticeably pile up.

So my read is that local isn’t replacing cloud — instead, work is splitting into two kinds. Repetitive, sensitive tasks move to local, while tasks requiring difficult judgment stay on cloud. What both companies are chasing is the market that’s moving to local, and there, the battleground is likely to be memory capacity and price rather than performance.

Closing

Let me wrap this up in three lines.

1. Xiaomi’s 1.22TB/s and Apple’s 1.2TB/s apply to different scopes. Loading an entire large model at once and reading the whole thing at that speed is something only Apple can do right now.
2. Neither company is fully self-sufficient — both follow a model of designing in-house while sourcing everything else. They share the same structure in that both depend on TSMC’s process and memory from external DRAM makers. The reason Xiaomi can do what Huawei can’t isn’t technology — it’s whether you’re inside or outside the sanctions line.
3. Local AI hardware isn’t opening up as a new category — it’s emerging as a derivative market of existing chip families. For Xiaomi, the root is its autonomous-driving chip; for Apple, it’s the iPhone chip.

When you read announced specs, I’d recommend first separating out which chip each number belongs to and what scope it applies to. In announcements that lump together chips with very different characters, just making that distinction alone filters out most of the exaggerated comparisons.

💬 Has anyone here paired a coding agent with a local model? Tell us in the comments — along with the model name — which tasks stayed local and where you had to fall back to the cloud. If enough cases come in, I’ll put together a “tasks safe to run locally” list in the next issue.

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💬 Share your experience with the question above.

📨 If you know a colleague weighing a Mac Studio build, forward this issue to them.

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References & Further Reading

Primary sources

• Apple Newsroom, “Apple unveils new Mac Studio with M5 Max and M5 Ultra,” August 2026. Link ··· Everything I use as this piece’s baseline — 512GB, 1.2TB/s, and ₩9,490,000 (~$6,850) — comes from here.
• Apple Newsroom, “Apple unveils more powerful Mac mini featuring all-new M6 and M5 Pro,” August 2026. Link ··· Where you can check the price and bandwidth of the entry-level local AI tier. The M6’s 32GB and 170GB/s is a realistic floor.
• IT之家, “Xiaomi AI Cube prototype unveiled,” August 24, 2026. Link ··· The original piece with the most detailed specs from launch day. Start here if you want to separate out the numbers for all three chips.
• Notebookcheck, “Xiaomi unveils AI Cube mini PC with three Xring chips and 150 W performance,” 2026. Link ··· The D100’s 2027 mass-production plans are here.
• HotHardware, “Xiaomi Taps TSMC For 3nm Xring O3 Chip With LPDDR6,” 2026. Link ··· The source for the N3P process, 24 billion transistors, and 133mm² die — the core evidence for the assembly thesis.
• Herald Corp, “[Exclusive] SK Hynix to mass-produce LPDDR6 in H2, Xiaomi first customer,” July 28, 2026. Link ··· Where you can see how Korean memory fits into this picture, including a mention of CXMT’s market share.
• Money Today, “Xiaomi phone resembling the Fold8 coming… ‘industry-first LPDDR6’ as its own-chip gambit,” August 25, 2026. Link ··· The most accurate Korean coverage of the O3’s figures. I confirmed the 113.8GB/s and 48% improvement numbers here.

Background

• EXO Labs, “Combining NVIDIA DGX Spark + Apple Mac Studio for 4x Faster LLM Inference.” Link ··· Useful for anchoring reference points like the DGX Spark’s 128GB and 273GB/s. It’ll help you get a feel for why bandwidth and capacity move independently of each other.
• Ollama and Codex CLI guides for connecting local models ··· These lay out the process of hooking a coding agent up to a local model, plus fixes for the problem of context getting silently truncated.

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The author is Oswarld (Kwangseob Ahn). Current roles: Adjunct Professor at Sejong University, Strategy Consultant at INLEVEL9. Career, research, books, and recent work are kept current on the About page. Latest · July 2026: HEMA-2: A Consolidation-Aware Tri-Memory Architecture with Multi-Channel Scheduling for Lifelong Conversational AI.

📝 Glossary

Footnotes

1. LPDDR6: The next-generation standard for the low-power DRAM used in smartphones and laptops. It can move more data on the same amount of power than its predecessor, LPDDR5X. AI models often bottleneck on moving data rather than on computation itself, so for on-device AI, this standard shift translates directly into a perceptible performance gain. ↩

2. Near-Memory Computing: A design that places the compute chip and memory as physically close together as possible, shortening the distance data has to travel. It’s similar to moving a warehouse right next to the factory. Shorter distances mean more data can move in the same amount of time, using less electricity. ↩

3. HBM (High Bandwidth Memory): Memory that stacks DRAM vertically to dramatically increase bandwidth. It’s mainly used in AI accelerators, but it’s expensive and production volume is limited, which still makes it difficult to fit into consumer devices. ↩